1. Field of the Invention
The present disclosure is directed to a method of forming metal oxide and an apparatus for performing the same. More particularly, the present disclosure is directed to a method of forming metal oxide on a semiconductor substrate such as a silicon wafer using a plasma-enhanced atomic layer deposition (PEALD) and an apparatus for performing the method.
2. Description of the Related Art
Semiconductor memory devices have been more highly integrated and operated at higher speeds by significantly reducing the size of memory cells in the devices. A reduced memory cell size has correspondingly decreased the area available for forming transistors and capacitors. Accordingly lengths of transistor gate electrodes have been decreased.
Decreased length of the transistor gate electrode causes a corresponding decrease in a thickness of a gate insulating layer beneath the gate electrode. When the gate insulating layer is formed from silicon oxide (SiO2) and has a thickness of less than about 20 Å, the operation of the transistor may be degraded by an increase in leakage current due to electron tunneling, infiltration of impurities in the gate electrode, and/or decrease in threshold voltage.
Capacitor capacitance in the memory cell decreases as the memory cell decreases in size. Reduction of the cell capacitance may cause the operation of the memory cell to be degraded by deterioration of data readability in the memory cell and/or increase in a soft error rate. As a result, the memory device may not properly operate at a relatively low voltage due to the reduction in the cell capacitance.
To improve the cell capacitance of the semiconductor memory device having a small cell region, it is known to form a dielectric layer having a very thin thickness. It is also known to form a lower electrode having a cylindrical shape or a fin shape so as to increase an effective area of the capacitors. In a dynamic random access memory (DRAM) device having a storage capacity of more than about 1 gigabyte: however, the above-mentioned approaches cannot be employed for manufacturing the DRAM device because these approaches do not enable a sufficiently high cell capacitance for the DRAM device to be obtained.
To address the above-mentioned challenges, it is known to form a dielectric layer using metal oxide having a high dielectric constant that is greater than that of silicon nitride. The metal oxide may be formed by an atomic layer deposition (ALD), a PEALD, and the like.
Particularly, metal oxide may be formed on a semiconductor substrate by a lateral flow type PEALD process. The metal oxide formed by the lateral flow type PEALD process may have improved electrical characteristics in general.
However, in the case where cylindrical lower electrodes having a high aspect ratio are formed on a semiconductor substrate and a metal oxide layer is then formed on the cylindrical lower electrodes by the lateral flow type PEALD process, the metal oxide layer may have poorer electrical characteristics in comparison with a metal oxide layer formed by a conventional ALD process.